In modern data processing systems, high-speed data links provide data communication paths between central processing units (CPUs), graphics processing units (GPUs), memory modules, peripheral device interfaces, network interfaces, and other system components. A high-speed data link may serialize a wide parallel data path into a smaller number of serial links. High-speed data links commonly implement differential signaling, which encodes a logical state for one data signal as a voltage difference between a pair of physical signals. A high-speed data link may include an arbitrary number of data signals, each with two physical signals to form a differential pair. While differential signaling is highly tolerant of noise, two physical signals (wires, pins, bumps, etc.) are required along the entire path from transmitter to receiver for each data signal, limiting area and power efficiency.
Single-ended signaling encodes one data signal on a single physical signal that includes an implicit reference, such as a local ground reference. A transmitter circuit may transmit a physical signal referenced to a local transmitter ground, while a receiver circuit may receive the physical signal as a voltage signal referenced to a local receiver ground. At the receiver, the voltage signal may include relative noise between the local transmitter ground and the local receiver ground, as well as noise coupled to the physical signal in transit. At relevant high speeds, such noise can significantly erode signal integrity for many useful applications of high-speed single-ended signaling. There is a need for addressing these issues and/or other issues associated with the prior art.